FIG. 1 is a top view a conventional display panel. The display panel comprises a first substrate and a second substrate, and liquid crystals are filled in between the first and second substrate. As illustrated in FIG. 1, the first substrate comprises gate lines 1, data lines 2, and a Thin Film Transistor (TFT) 3, a pixel unit 6 (that is, a region defined by edges of gate lines 1 and data lines 2) is defined by the gate lines 1 and the data lines 2. The pixel unit 6 has a pixel electrode 5 disposed therein, and a passivation layer is formed over the TFT 3. A via hole is formed in the passivation layer, the pixel electrode 5 may be connected to a drain electrode of the TFT by way of the via hole. The second substrate comprises a black matrix 4, which is configured as corresponding to the gate lines 1, the data lines 2 and the TFT 3, such that light of pixel is partitioned.
It is seen from FIG. 1 that the black matrix 4 is normally configured as completely overlaying the gate lines and the data lines, in consideration of factors such as light leakage of the display panel and unstable electric fields at peripheral regions of the pixel electrode. That is, orthographic projections of sides of an aperture 7 in the black matrix 4 in a plane of the substrate are configured as falling within the pixel unit 6 or being aligned to edges of the gate lines 1 and/or the data lines 2.
However, the above configuration will make the black matrix 4 to cover a relatively large area, which makes the pixel of the display panel to have a small aperture ratio. Moreover, such a black matrix 4 also limits a viewing angle of the display panel.